Plasma-enhanced chemical vapor deposition (PECVD) is a process widely used in the manufacture of semiconductor devices for depositing layers of electronic materials on various substrates. In a PECVD process, a substrate is placed in a vacuum deposition chamber equipped with a pair of parallel plate electrodes. The substrate is generally mounted on a susceptor which is also the lower electrode. A flow of a reactant gas is provided in the deposition chamber through a gas inlet manifold which also serves as the upper electrode. A radio frequency (RF) voltage is applied between the two electrodes which generates an RF power sufficient to cause a plasma to be formed in the reactant gas. The plasma causes the reactant gas to decompose and deposit a layer of the desired material on the surface of the substrate body. Additional layers of other electronic materials can be deposited on the first layer by flowing into the deposition chamber a reactant gas containing the material of the additional layer to be deposited. Each reactant gas is subjected to a plasma which results in the deposition of a layer of the desired material.
In recent years, large liquid crystal cells have been used for flat panel displays. These type of liquid crystal cells contain two glass plates joined together with a layer of a liquid crystal material sandwiched therebetween. The glass substrates have conductive films coated thereon with at least one of the substrates being transparent such as an ITO film. The substrates can be connected to a source of power to change the orientation of the liquid crystal material. Various areas of the liquid crystal cell can be accessed by proper patterning of the conductive films. More recently, thin film transistors have been used to separately address areas of the liquid crystal cell at very fast rates. Such liquid crystal cells are useful for active matrix displays such as TV and computer monitors.
As the requirements for resolution of liquid crystal monitors increase, it is becoming desirable to address a large number of separate areas of the liquid crystal cell, called pixels. In a modern display panel, more than 1,000,000 pixels can be present. At least the same number of transistors must be formed on the glass plates such that each pixel can be separately addressed and left in the switched state while other pixels are addressed.
One of the two major types of thin film transistor devices used is the so-called back channel etched (BCE) thin film transistor. A major CVD process step in BCE TFT processing is the sequential deposition of three layers; an insulating layer of typically a gate silicon nitride, gate silicon oxide, or both followed by an intrinsic (un-doped) amorphous silicon (i-a-Si) layer, and then a thin layer of phosphorus-doped amorphous silicon (n.sup.+ -a-Si) in three separate CVD chambers. Although the doped amorphous silicon layer may be only about 40.about.60 nm thick, conventionally it must be deposited in a separate process chamber, so that no residual phosphorus can be left in the chamber to contaminate the intrinsic amorphous silicon film in a subsequent process.
The deposition step for the doped amorphous silicon layer is important in the total deposition process for the amorphous silicon-based TFT. The doped amorphous silicon layer deposited on top of the intrinsic amorphous silicon layer improves the electrical contact between the intrinsic amorphous silicon layer and the subsequently deposited metal layer. The deposition of a thin doped amorphous silicon layer between such intrinsic amorphous silicon layer and the metal layer allows an ohmic contact to be formed between the two layers.
If only a single one CVD chamber were to be used for the deposition of both the intrinsic amorphous silicon layer and the doped amorphous silicon layer, any residual dopant gas or particles, i.e. particles of phosphorus, antimony, arsenic or boron, become contaminants when such particles are left in the chamber and cover the chamber walls. When the deposition process is repeated for the next TFT substrate, the residual dopants left on the chamber wall contaminate the intrinsic amorphous silicon layer as an impurity. Such contamination renders the thin film transistor device defective and unusable.
As a consequence, when a conventional PECVD process is used for the manufacture of thin film transistors to sequentially deposit a layer of intrinsic amorphous silicon and doped amorphous silicon, the deposition process for the doped amorphous silicon layer must be conducted in a separate CVD chamber from the chamber used for the undoped amorphous silicon layer. Because of the large size and weight of glass substrates which are for example about 360.times.465.times.1.1 mm in size, large reaction chambers are generally required for deposition of thin films thereon, and large and often slow transfer equipment is needed to transfer the substrates from one reaction chamber to another for sequential deposition of these thin films. The transfer of substrates consumes valuable processing time and reduces the throughput of the system. Furthermore, the transfer is generally accompanied by a drop in substrate temperature; thus the substrate has to be reheated up to the deposition temperature after such transfer, again adding to the processing time required for deposition. In addition, the danger of contamination of the deposited film during transfer from one chamber to another is always present.
It is therefore an object of the present invention to provide a high-throughput method of depositing layers of intrinsic amorphous silicon and doped amorphous silicon sequentially on a substrate.
It is another object of the present invention to provide an improved method of depositing layers of intrinsic amorphous silicon and doped amorphous silicon sequentially on a substrate in the same chemical vapor deposition chamber without incurring a contamination problem in the intrinsic amorphous silicon layer.